Alternative Approaches to 3-D Packaging Published Dec. 4, 2006 By Sensors Directorate AFRL/SN WRIGHT-PATTERSON AIR FORCE BASE, Ohio -- AFRL and the University of Arkansas developed alternative approaches to three-dimensional (3-D) packaging under a Cooperative Research and Development Agreement. The work focused on the formation of silicon through-vias that allow vertical connections in a 3-D wafer stack. This process is becoming sufficiently stable, and the team has shifted its focus to a series of test structures intended to verify reliability and electrical performance. These test structures comprise via chains (for testing reliability) and other patterns (for use in characterizing the vias' electrical performance). The team created its first wafer with a stitch pattern connecting the top and bottom layers of the wafer. These novel processes will facilitate the integration of digital and radio frequency functionality at a hardware level and thus enable the creation of miniaturized reconfigurable electronics that can be adapted to warfighter needs.